An integrated circuit device may electrically alter the threshold voltage of its NMOS transistors by raising the Vss power rail voltage above the bulk (e.g., well, tub, or substrate) voltage of the integrated circuit substrate (sometimes referred to as a “virtual ground”). This technique is commonly used to reduce the power consumption of the integrated circuit device due to sub-threshold leakage. Generally, the integrated circuit device will have two or more independent voltage domains to service respective logic circuits that have signal paths therebetween; some of these voltage domains may operate on the virtual ground, and other voltage domains may operate on true ground.
A problem exists in an integrated circuit device when a virtual ground of a signal source at a logic “0” is higher, e.g., more positive, than true ground, VSS, in that a logic gate may sneak current and/or logic state corruption when a logic “0” signal to that logic gate does not have the ground level thereof restored to true ground.